A 2-bit Analog-to-Digital Converter (ADC) with a priority encoder is a simple circuit that converts an analog voltage signal into a 2-bit digital output. This type of ADC uses comparators to compare the input voltage against reference voltage levels and a priority encoder to produce the corresponding binary output. Here’s a breakdown of how it works:

Components of a 2-Bit ADC with Priority Encoder

1. Input Voltage (VIN): The analog signal that you want to convert to a digital format.
2. Comparators: Two comparators are used to compare the input voltage against two reference voltage levels. Each comparator outputs a HIGH or LOW signal based on the comparison.
3. Reference Voltages (VREF1 and VREF2): These are the voltage levels against which the input voltage is compared. For a 2-bit ADC, you typically set the reference voltages to divide the input range into four levels:
   • VREF1 = 1V
   • VREF2 = 2V
4. Priority Encoder: This component takes the outputs from the comparators and encodes them into a binary format. The priority encoder ensures that if multiple comparators output HIGH, the one with the highest priority is selected.

Operation of the 2-Bit ADC

1. Voltage Levels: The input voltage (VIN) is compared against the reference voltages:
   • If VIN < VREF1 (1V), both comparators output LOW (00).
   • If VREF1 ≤ VIN < VREF2 (1V ≤ VIN < 2V), the first comparator outputs HIGH, and the second outputs LOW (01).
   • If VREF2 ≤ VIN < VMAX (2V ≤ VIN < 3V), the first comparator outputs HIGH, and the second outputs HIGH (10).
   • If VIN ≥ VMAX (3V), both comparators output HIGH (11).
2. Priority Encoding: The priority encoder takes the outputs from the comparators:
   • If both comparators are LOW, the output is 00.
   • If the first comparator is HIGH and the second is LOW, the output is 01.
   • If the first comparator is HIGH and the second is also HIGH, the output is 10.
   • If both comparators are HIGH, the output is 11.

Example Circuit

Here’s a simple representation of how the circuit might be set up:

          +-------+          +-------+
VIN ----->| Comp 1 |----->---|       |
          | (VREF1)|        |       |
          +-------+          |       |
                             | Encoder|-----> Output (Q1, Q0)
          +-------+          |       |
VIN ----->| Comp 2 |----->---|       |
          | (VREF2)|        +-------+
          +-------+

Truth Table

🧠Simulation

https://gist.github.com/viadean/b562594fea7b78782c3a2809c737b6fb